Dutch semiconductor equipment manufacturer ASML is reportedly advancing into the next stage of hybrid bonding technology, a development that could reshape chip packaging and performance. Hybrid bonding is a process that enables dense electrical connections by joining chips or silicon wafers directly, improving the efficiency and capabilities of semiconductor devices.
Between December 2022 and November 2024, ASML submitted at least 27 patent families related to hybrid bonding equipment, according to an industry report released Thursday by semiconductor and AI supply chain research group SemiAnalysis. The actual figure may be higher due to publication delays in recent filings. The move signals ASML’s intent to diversify beyond its established dominance in lithography into back-end chip manufacturing processes, driven by increased demand for high-performance chips in fields such as artificial intelligence.
The company has reportedly collaborated with Dutch technology firms Prodrive Technologies and VDL ETG to develop the hybrid bonder architecture. Analysts suggest ASML may leverage its expertise from lithography—specifically in alignment precision and particle contamination control—to gain advantages in bonding yield, two critical factors underpinning hybrid bonding performance.
While ASML has not formally detailed its progress in this area, CEO Christophe Fouquet indicated during the company’s April earnings call that ASML is exploring growth opportunities to better support customers in hybrid bonding. The company later confirmed via email that it continues to monitor the evolution of 3D integration technologies to align them with ASML’s roadmap and core competencies.
Hybrid bonding is increasingly regarded as a significant innovation in semiconductor packaging. The technique enables ultra-high-density interconnections and helps reduce thermal resistance in high-bandwidth memory stacks by roughly 30 percent, according to a September research note from Guotai Huatong Securities citing Samsung data. Lower thermal resistance facilitates more efficient heat dissipation, potentially reducing cooling demands and associated costs.
In China, major firms such as Huawei Technologies and ChangXin Memory Technologies (CXMT) have embraced hybrid bonding amid U.S.-led export restrictions that prevent them from importing some of ASML’s most advanced lithography machines, especially extreme ultraviolet (EUV) systems.
Huawei recently revealed new information about its Kirin 9050 chip series, which employs the company’s proprietary LogicFolding architecture within a framework called the Tau Scaling Law. The design reportedly integrates more than 50 million hybrid bonds and achieves a 53.5 percent increase in transistor density. Meanwhile, CXMT announced its latest “4F square” DRAM architecture using hybrid bonding, enabling increased wafer bit density without relying on cutting-edge EUV lithography.
These developments highlight hybrid bonding as a key technology enabling semiconductor makers to enhance chip density and performance despite global supply chain constraints and technological embargoes. As demand for advanced chips continues to grow, ASML’s expansion into hybrid bonding tools positions it to play a broader role in the evolving semiconductor ecosystem.